1. Field of the Invention
The present invention relates to an oscillation frequency control circuit of an oscillator, and more particularly, to an oscillation frequency control circuit capable of correcting its own frequency in synchronization with an output signal, maintaining a stable oscillation frequency for a constant period even when a highly stable reference signal is not input thereto, and oscillating with a control voltage generated by making an external fixed voltage variable.
2. Description of the Related Art
In a base station of a next-generation mobile communication system, a terrestrial digital broadcasting system, and the like, the precision required for a frequency reference signal has become higher.
In order to generate a frequency reference signal, a cesium frequency reference oscillator, a rubidium frequency reference oscillator, a reference oscillator of a frequency synchronization type using a GPS signal, and the liker are used in broadcasting and communication systems.
However, since these oscillators are usually expensive, the reference signal from the oscillators is divided to be used as a reference signal source of an apparatus.
The divided reference signal is used as a reference clock for a communication system.
Specifically, the reference signal is used as a reference signal for phase comparison in a PLL (phase locked loop) circuit, a reference clock signal for a DSP (digital signal processor), an FPGA (field programmable gate array) or the like, and a sampling clock for a D/A (digital/analog) converter or an A/D (analog/digital) converter.
[Conventional PLL Circuit: FIG. 6]
Next, a description of a conventional PLL circuit will be provided with reference to FIG. 6. FIG. 6 is a configuration block diagram of a typical PLL circuit.
As illustrated in FIG. 6, the PLL circuit is provided with a phase comparator 32 configured to compare an external reference signal (Fref) with a 1/N divided signal to output a phase difference signal, a charge pump 33 configured to output the phase difference as a pulse width signal, a loop filter 34 configured to smooth out an output voltage from the charge pump 33, a voltage controlled crystal oscillator (VCXO) 35 configured to change a frequency in accordance with a control voltage from the loop filter 34 to oscillate and output a desired frequency (internal reference signal: output frequency), and a frequency divider (divider) 36 configured to divide the output (internal reference signal) of the VCXO 35 to 1/N.
The internal reference signal corresponds to an N*Fref signal.
The PLL circuit is configured to apply feedback control to the internal VCXO 35 so that a phase difference between an external reference signal and the output frequency of the VCXO 35 to thereby obtain an oscillator output synchronized with the reference signal.
Specifically, the phase comparator 32 is configured to compare phases of a highly stable external reference signal and an output signal from the VCXO 35 performing frequency control based on an input voltage and perform PLL control so that a DC voltage obtained by smoothing out a phase comparison result is fed back to the VCXO 35 to thereby generating a highly precise signal.
The PLL circuit is widely used in communication and broadcasting apparatuses and the like.
An example of the prior art of an oscillation frequency control circuit in the conventional oscillator is disclosed in Japanese Patent Application Laid-Open No. 2000-083003 (Patent Document 1) and Japanese Patent Application Laid-Open No. 2003-179489 (Patent Document 2).
Patent Document 1 discloses a free running frequency adjustment system in which a frequency counter performs a counting operation synchronized with an output signal of a VCO (voltage controlled oscillator) which is input within a period of time corresponding to a pulse width, a latch circuit stores therein a count value corresponding to an oscillation frequency of the VCO, and when the count value deviates from a predetermined range, a CPU changes an application voltage to the VCO to adjust a free-running frequency of the VCO 10 to be within a predetermined range.
Patent Document 2 discloses a phase locked loop circuit having a function of automatically adjusting a free-running frequency of a voltage-controlled oscillator (VCO), in which a microcomputer counts the number of pulses of a pulse signal output from the VCO in a period in which an output from a phase comparator is at a predetermined level and updates a control data based on the counted value, and a DAC (digital analog converter) converts the data to an analog signal so that the analog signal is combined with a signal from an LPF (low pass filter) to be used as a frequency control signal of the VCO.
Patent Document 1: Japanese Patent Application Laid-Open No. 2000-083003
Patent Document 2: Japanese Patent Application Laid-Open No. 2003-179489
However, in the conventional PLL circuit, since the phase comparison cannot be performed when a reference signal is not input thereto, the PLL circuit may switch over to another external reference signal or operate in a free-running state of the voltage-controlled oscillator. When it switches over to another external reference signal from a backup system, since PLL control is performed again, the deviation of the reference signal depends on the external reference signal, and therefore, it does not cause any problem. However, when it switches over to operate in the free-running state, the frequency is excessively controlled in response to a phase comparison result during the switching to stick to an upper or lower limit frequency, and thus, there is a problem that the frequency deviation becomes large.
As a short-term solution to solve the problem of the free running, a highly stable VC-TCXO (voltage controlled-temperature compensated crystal oscillator) may be used as the voltage-controlled oscillator.
However, although such a solution allows operation with a frequency stability of e.g., ±0.5 ppm, it might not be able to provide satisfactory performance for a long period of time due to aging.
For example, when it is assumed that aging characteristics are about ±1 ppm per year, a frequency deviation may amount to maximum 10.5 ppm at the elapse of 10 years. This may also be explained that if an output frequency of a carrier wave in communication is 800 MHz, a frequency deviation may amount to 8.4 kHz similar to that of the reference frequency. Such a frequency deviation is not allowable to a system.
Moreover, even in a highly stable system using a VC-OCXO (voltage controlled, oven controlled crystal oscillator), since the aging characteristics may cause a frequency deviation in a long period of time, it is necessary to perform a correction operation every predetermined period of time, and therefore, there was a problem that the correction operation is troublesome.
Moreover, the system or circuit disclosed in Patent Document 1 or 2 counts the output of the VCO or the output of the phase comparator to perform adjustment of the free-running frequency. However, the system or circuit does not perform the frequency adjustment by directly detecting an abnormality of the external reference signal and is unable to sufficiently cope with the aging.
[Control Voltage Characteristics of VCXO: FIG. 7]
The control voltage characteristics of the VCXO are shown in FIG. 7. FIG. 7 is a view showing exemplary control voltage characteristics of a voltage controlled crystal oscillator. In FIG. 7, the horizontal axis represents a control voltage, and the vertical axis represents a frequency deviation.
In the example VCXO of FIG. 7, the VCXO is able to operate when the control voltage is in the range of 0 to 4 V, while it is unable to operate when the control voltage is 4 V or more.
Since the frequency deviation rises with the lapse of time even in the case of the VCXO, an appropriate control voltage changes accordingly.
[Free-Running Characteristics: FIG. 8]
Further, free-running characteristics of the VCXO are shown in FIG. 8. FIG. 8 is a graph illustrating the free-running characteristics of the VCXO.
Even in the case of the VCXO, since frequency deviation increases with the passage of time, an appropriate control voltage changes. It is likewise applied to a temperature compensated crystal oscillator.
[Frequency Characteristics: FIG. 9]
Next, frequency characteristics when an external reference signal is a highly stable signal from a rubidium oscillator and the like are shown in FIG. 9. FIG. 9 is a graph illustrating frequency characteristics when the external reference signal is a highly stable signal.
As shown in FIG. 9, when the external reference signal is a highly stable signal from a rubidium oscillator and the like, frequency deviation occurs in the range allowable to a system regardless of the passage of time.
[Frequency Characteristics when External Reference Signal is Interrupted: FIG. 10]
Further, frequency characteristics when the external reference signal is interrupted are shown in FIG. 10. FIG. 10 is a graph illustrating the frequency characteristics when the external reference signal is interrupted.
According to the frequency characteristics when the external reference signal is interrupted as shown in FIG. 10, after frequency deviation significantly increases at the time of connection interruption, the frequency deviation gradually increases with the passage of time. If periodic correction is not performed, the frequency deviation may exceed the frequency range allowable to a system.
Further, some base stations may not obtain the external reference signal. In such a case, instead of the PLL circuit, an oscillator with a different configuration capable of oscillating with a fixed voltage is necessary, and oscillation control circuits corresponding to base stations must be prepared.